Continuously updated with contents read from Flash or EEPROM. In the event of an ECC
error, it will then contain the erroneous data read from the memory, comprising one,
two, or possibly more bit errors.
The DATA0, DATA1 and DATA2 register triplet represents the 24-bit value DATA
register. The low byte [7:0] (suffix 0) is accessible at the original offset. The
high byte [15:8] (suffix 1) can be accessed at offset + 0x01. The extended byte
[23:16] (suffix 2) can be accessed at offset + 0x02. The MSb of the register is in
bit 23.
The data register will contain the last read value from Flash or EEPROM. For EEPROM
access, only DATA[14:0] is used. For Flash access, only DATA[22:0] is used. Unused
bits will read as ‘0’.