18.5.3 Main Clock Control C
Attempting to write to this register without following the appropriate CCP unlock sequence will return a bus error.
| Name: | MCLKCTRLC |
| Offset: | 0x02 |
| Reset: | 0x00 |
| Property: | Configuration Change Protection |
| Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
| CFD1 | CFD0 | ||||||||
| Access | R/W | R/W | |||||||
| Reset | 0 | 0 |
Bit 1 – CFD1 Inject error in CFD1
Control error injection. Automatically cleared by HW when error has been injected.
| Value | Name | Description |
|---|---|---|
| 0x0 | DISABLE | Do not inject error |
| 0x1 | ENABLE | Inject error |
Bit 0 – CFD0 Inject error in CFD0
Control error injection. Automatically cleared by HW when error has been injected.
| Value | Name | Description |
|---|---|---|
| 0x0 | DISABLE | Do not inject error |
| 0x1 | ENABLE | Inject error |