18.5.9 Main Clock Clock Frequency Measure n Value

The number of measure clock cycles. This register is cleared by HW at the start of a measurement period. The CLKCTRL.MCLKCFMnVALUEL and CLKCTRL.MCLKCFMnVALUEH registers represent the 16-bit value, CLKCTRL.MCLKCFMnVALUE. The low byte [7:0] (suffix L) is accessible at the original offset. The high byte [15:8] (suffix H) can be accessed at offset + 0x01. The VALUE register is NOT buffered by a TEMP register to ensure a consistent readout. The MSB of the VALUE register is bit 15.