54.14.6 PCC Characteristics

Speed requirements for all 8/10/12/14-bits are:

APB clock minimum is 2 × N pclk

Figure 54-23. PCC - Peripheral Capture Controller Timing Diagrams

Table 54-64. PCC - Peripheral Capture Controller Electrical Specifications ⁽⁴⁾
AC CHARACTERISTICS			Standard Operating Conditions: VDDIO=VDDANA 1.71V to 3.63V (unless otherwise stated) -40°C ≤ TA ≤ +125°C
Param. No.	Symbol	Characteristics	Min.	Typical	Max.	Units	Conditions
PCC1	PCC_CLK	External PCC Data Input Clock Period	20	—	—	ns	VDDIOx(min)
PCC3	PCCHIGH	PCC Data Clock input High time	10	—	—	ns
PCC5	PCCLOW	PCC Data Clock input Low time	10	—	—	ns
PCC7	PCCDSETUP	Clock to Data Setup Time	3	—	—	ns
PCC9	PCCDHOLD	Clock to Data Hold Time	2	—	—	ns
PCC11	PCCDENBSETUP ⁽²⁾	Data Enable [1,2] Setup Time⁽²⁾	3	—	—	ns
PCC13	PCCDENBHOLD⁽³⁾	Data Enable [1,2] Hold Time ⁽³⁾	2
PCC15	CLK_APB_PCC⁽¹⁾	Internal MCLK PCC Module Clock ⁽¹⁾	—	—	fCPU	Mhz

Note:

CLK_APB_PCC ≥ (2 * PCC_CLK).
PCCDENBSETUP ≥ PCC7.
PCCDENBHOLD ≥ PCC9.
These values are based on simulation. They are not covered by production test limits or characterization.