54.14.2 SERCOM in SPI Mode Timing

Figure 54-8. SPI Timing Requirements in Host Mode

Figure 54-9. SPI Timing Requirements in Client Mode

Table 54-56. SPI Timing Characteristics and Requirements⁽¹⁾
Symbol	Parameter	Conditions		Min.	Typ.	Max.	Units
t_{SCK⁽¹⁰⁾}	SCK period	Host	Reception	2*(t_MIS+t_{CLIENT_OUT})⁽³⁾	-	-	ns
t_{SCK⁽¹⁰⁾}	SCK period	Host	Transmission	2*(t_MOV+t_{CLIENT_IN})⁽⁴⁾	-	-
t_SCKW	SCK high/low width	Host		-	0.5*t_SCK
t_SCKR	SCK rise time⁽²⁾	Host, VDD>2.70V		-	-	2.68
t_SCKR	SCK rise time⁽²⁾	Host, VDD>1.71V				5.41
t_SCKF	SCK fall time⁽²⁾	Host, VDD>2.70V		-	-	2.81
t_SCKF	SCK fall time⁽²⁾	Host, VDD>1.71V			-	5.84
t_MIS	MISO setup to SCK	Host, VDD>2.70V		18	-	-
t_MIS	MISO setup to SCK	Host, VDD>1.71V		19	-	-
t_MIH	MISO hold after SCK	Host,VDD>2.70V		0	-	-
t_MIH	MISO hold after SCK	Host, VDD>1.71V		0	-	-
t_MOV	MOSI output valid SCK	Host, VDD>2.70V		-	-	9
t_MOV	MOSI output valid SCK	Host, VDD>1.71V		-	-	14
t_MOH	MOSI hold after SCK	Host, VDD>2.70V		-3	-	-
t_MOH	MOSI hold after SCK	Host, VDD>1.71V		-3	-	-
t_SSCK	Client SCK Period	Client	Reception	2*(t_SIS+t_{HOST_OUT})⁽⁵⁾	-	-	ns
t_SSCK	Client SCK Period	Client	Transmission	2*(t_SOV+t_{HOST_IN})⁽⁶⁾	-	-
t_SSCKW	SCK high/low width	Client		-	0.5*t_SSCK	-
t_SSCKR	SCK rise time⁽²⁾	Client		-	0.25*t_SSCK	-
t_SSCKF	SCK fall time⁽²⁾	Client		-	0.25*t_SSCK	-
t_SIS	MOSI setup to SCK	Client, VDD>2.70V		7.5	-	-
t_SIS	MOSI setup to SCK	Client, VDD>1.71V		8.5	-	-
t_SIH	MOSI hold after SCK	Client, VDD>2.70V		4	-	-
t_SIH	MOSI hold after SCK	Client, VDD>1.71V		4	-	-
t_SSS	SS setup to SCK	Client	PRELOADEN=1	t_SOSS+t_{EXT_MIS}+2*t_APBC⁽⁸⁾⁽⁹⁾	-	-
t_SSS	SS setup to SCK	Client	PRELOADEN=0	t_SOSS+t_{EXT_MIS}⁽⁸⁾	-	-
t_SSH	SS hold after SCK	Client		0.5*t_SSCK	-	-
t_SOV	MISO output valid SCK	Client, VDD>2.70V		15	-	-
t_SOV	MISO output valid SCK	Client, VDD>1.71V		24	-	-
t_SOH	MISO hold after SCK	Client, VDD>2.70V		0	-	-
t_SOH	MISO hold after SCK	Client, VDD>1.71V		0	-	-
t_SOSS	MISO setup after SS low	Client, VDD>2.70V		-	-	1* t_SCK
t_SOSS	MISO setup after SS low	Client, VDD>1.71V		-	-	1* t_SCK

These values are based on simulation, with capacitance load between 5 pF and 20 pF. These values are not covered by test limits in production.
Refer to the section “I/O Pin Characteristics”.
Where t_{CLIENT_OUT} is the Client external device output response time, generally t_{EXT_SOV}+t_{LINE_DELAY} ⁽⁷⁾.
Where t_{CLIENT_IN} is the Client external device input constraint, generally t_{EXT_SIS}+t_{LINE_DELAY} ⁽⁷⁾.
Where t_{CLIENT_OUT} is the Host external device output response time, generally t_{EXT_MOV}+t_{LINE_DELAY} ⁽⁷⁾.
Where t_{CLIENT_IN} is the Host external device input constraint, generally t_{EXT_MIS}+t_{LINE_DELAY} ⁽⁷⁾.
t_{LINE_DELAY} is the transmission line time delay.
t_{EXT_MIS} is the input constraint for the Host external device.
t_APBC is the APB period for SERCOM.
When the integrity of communication is required to maintain both transmission and reception, the maximum SPI clock frequency must be the lower value of the reception or transmission mode maximum frequency as shown in the following equations.
- Reception: t_SCK = 2*(t_MIS+t_{CLIENT_OUT}) = 2*(18 + 8) = 52nS
- Transmission: t_SCK = 2*(t_MOV+t_{CLIENT_IN}) = 2*(9 + 20) = 58nS