14 USB
DBG
USB INTRUSB/INTrRx and INTrTx registers are cleared by a read operation, including debug access. This can lead to improper function during debugging.
Workaround
None.
Affected Silicon Revisions
| A1 | A2 | ||||
|---|---|---|---|---|---|
| X | X |
APB
Addressing some PHY registers sets the APB clock request permanently.
Workaround
In the startup code, perform a dummy read to the USB.STATUS register. After accessing a register in the USB, the PHY subspace (starting with PHY00) should always be followed by a dummy read of the USB.STATUS register to clear the APB clock request.
Affected Silicon Revisions
| A1 | A2 | ||||
|---|---|---|---|---|---|
| X | X |
ESD Protection
The VUSB3V3_0 and VUSB3V3_1 USB supply pads may experience permanent ESD damage when subjected to HBM stress above 500 V.
Workaround
Limit HBM ESD exposure on VUSB3V3_0 and VUSB3V3_1 to 500 V or less.
Affected Silicon Revisions
| A1 | A2 | ||||
|---|---|---|---|---|---|
| X |