5 MCLK
CLKDIV
Any Halfword write to offset 2 or BYTE write at offset 1/2/3 to the CLKDIV register with RSVD value is causing PSLVERR.
Workaround
Only WORD access is allowed to the CLKDIV register.
Affected Silicon Revisions
| A1 | A2 | ||||
|---|---|---|---|---|---|
| X | X |
Any Halfword write to offset 2 or BYTE write at offset 1/2/3 to the CLKDIV register with RSVD value is causing PSLVERR.
Only WORD access is allowed to the CLKDIV register.
| A1 | A2 | ||||
|---|---|---|---|---|---|
| X | X |
Rev: I
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