19.11.10 TC3 Control Register C
| Name: | TCCR3C |
| Offset: | 0x92 |
| Reset: | 0x00 |
| Property: | - |
| Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
| FOC3A | FOC3B | ||||||||
| Access | R/W | R/W | |||||||
| Reset | 0 | 0 |
Bits 6, 7 – FOC3 Force Output Compare for Channel B and A
The FOC3A/FOC3B bits are only active when the WGM3[3:0] bits specifies a non-PWM mode. When writing a logical one to the FOC3A/FOC3B bit, an immediate compare match is forced on the Waveform Generation unit. The OC3A/OC3B output is changed according to its COM3x[1:0] bits setting. Note that the FOC3A/FOC3B bits are implemented as strobes. Therefore it is the value present in the COM3x[1:0] bits that determine the effect of the forced compare.
A FOC3A/FOC3B strobe will not generate any interrupt nor will it clear the timer in Clear Timer on Compare Match (CTC) mode using OCR3A as TOP. The FOC3A/FOC3B bits are always read as zero.