25.1 Functional Description

EDAC algorithms generate additional checksum bits for each data word to be stored. The checksum bits are generated and written to the memory when the data bits are written, as shown in the following figure. When the word is read, the checksum bits are utilized to determine whether one or more bits are in error. If the error is a single-bit error, checksum bits determine which bit contains the error. EDAC algorithms implemented in SmartFusion 2 SOC devices are designed to detect all two-bit errors and correct all single-bit errors within a single word.

When data is written to a storage element in memory through EDAC, checksum bits are generated based on the input data pattern. The checksum bits, along with the input data, are stored in the target memory. This permits the data to propagate to the data storage element unchanged while the appropriate checksum bits are generated to be stored along with the data.

For a read operation, the checksum bits are computed from the Data In inputs, and XORed with the Checksum Bits In inputs to form the error syndrome. The error syndrome is internally generated and is not user-accessible.

If all bits of the error syndrome are 0, then there is no error. If one or more syndrome bits are 1, then an error is detected as indicated by the output Err_detect = 1. If the error is not correctable (2 or more bits errored), then it is indicated by the output Err_multpl = 1. The error syndrome indicates which bit is in error, or whether multiple bits are in error, and is useful in systems where it is desirable to keep a log of which bits have been in error.

When a correctable error is detected (indicated by Err_detect = 1 and Err_multpl = 0), the data bit in error is corrected as it passes from Data In to Data Out. If the error is not correctable (indicated by Err_multpl = 1), data passes unchanged from Data In to Data Out.

There are interrupts associated with errors. These are covered in the chapter for each memory type.