2.5.2.3 Behavior of Memory Accesses
The following table provides information about the behavior of accesses to each region in the memory map.
Address range | Memory region | Memory Type1 | XN1 | Description |
---|---|---|---|---|
0x00000000- 0x1FFFFFFF | Code | Normal | — | Executable region for program code. You can also put data here. |
0x20000000- 0x3FFFFFFF | SRAM | Normal | — | Executable region for data. You can also put code here. This region includes bit band and bit band alias areas, see Table 2-13. |
0x40000000- 0x5FFFFFFF | Peripheral | Device | XN | This region includes bit band and bit band alias areas, see Table 2-14. |
0x60000000- 0x9FFFFFFF | External RAM | Normal | — | Executable region for data. |
0xA0000000- 0xDFFFFFFF | External device | Device | XN | External Device memory. |
0xE0000000- 0xE00FFFFF | Private Peripheral Bus | Strongly- ordered | XN | This region includes the NVIC, System timer, and system control block. |
0xE0100000- 0xFFFFFFFF | Vendor specific | Device | XN | Accesses to this region are to vendor-specific peripherals. |
Note:
- See 2.5.2.1 Memory Regions, Types and Attributes for more information.
The Code, SRAM, and external RAM regions can hold programs. However, Arm recommends that programs always use the Code region. This is because the processor has separate buses that enable instruction fetches and data accesses to occur simultaneously.
The MPU can override the default memory access behavior described in this section. For more information, see 2.4.4 Memory Protection Unit.