PIC16(L)F18425/45

32.7 Register Summary - ADC Control


Offset	Name	Bit Pos.	7	6	5	4	3	2	1	0
0x00 ... 0x8B	Reserved
0x8C	ADLTH	7:0	LTH[7:0]
0x8C	ADLTH	15:8	LTH[15:8]
0x8E	ADUTH	7:0	UTH[7:0]
0x8E	ADUTH	15:8	UTH[15:8]
0x90	ADERR	7:0	ERR[7:0]
0x90	ADERR	15:8	ERR[15:8]
0x92	ADSTPT	7:0	STPT[7:0]
0x92	ADSTPT	15:8	STPT[15:8]
0x94	ADFLTR	7:0	FLTR[7:0]
0x94	ADFLTR	15:8	FLTR[15:8]
0x96	ADACC	7:0	ACC[7:0]
		15:8	ACC[15:8]
		23:16							ACC[17:16]
0x99	ADCNT	7:0	CNT[7:0]
0x9A	ADRPT	7:0	RPT[7:0]
0x9B	ADPREV	7:0	PREV[7:0]
0x9B	ADPREV	15:8	PREV[15:8]
0x9D	ADRES	7:0	RES[7:0]
0x9D	ADRES	15:8	RES[15:8]
0x9F	ADPCH	7:0			PCH[5:0]
0xA0 ... 0x010B	Reserved
0x010C	ADACQ	7:0	ACQ[7:0]
0x010C	ADACQ	15:8				ACQ[12:8]
0x010E	ADCAP	7:0				CAP[4:0]
0x010F	ADPRE	7:0	PRE[7:0]
0x010F	ADPRE	15:8				PRE[12:8]
0x0111	ADCON0	7:0	ON	CONT		CS		FRM		GO
0x0112	ADCON1	7:0	PPOL	IPEN	GPOL					DSEN
0x0113	ADCON2	7:0	PSIS	CRS[2:0]			ACLR	MD[2:0]
0x0114	ADCON3	7:0		CALC[2:0]			SOI	TMD[2:0]
0x0115	ADSTAT	7:0	OV	UTHR	LTHR	MATH		STAT[2:0]
0x0116	ADREF	7:0				NREF			PREF[1:0]
0x0117	ADACT	7:0				ACT[4:0]
0x0118	ADCLK	7:0			CS[5:0]
0x0119 ... 0x029E	Reserved
0x029F	ADCPCON0	7:0	CPON							CPRDY

The online versions of the documents are provided as a courtesy. Verify all content and data in the device’s PDF documentation found on the device product page.