32.8.12 ADACQ
Note:
- If ADPRE is not equal to
‘
0’, then ADACQ =0b0_0000_0000_0000means acquisition time is 8192 clocks of the selected ADC clock. - The individual bytes in this
multibyte register can be accessed with the following register names:
- ADACQH: Accesses the high byte ADACQ[12:8]
- ADACQL: Accesses the low byte ADACQ[7:0]
| Name: | ADACQ |
| Offset: | 0x10C |
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | |
| ACQ[12:8] | |||||||||
| Access | R/W | R/W | R/W | R/W | R/W | ||||
| Reset | 0 | 0 | 0 | 0 | 0 | ||||
| Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
| ACQ[7:0] | |||||||||
| Access | R/W | R/W | R/W | R/W | R/W | R/W | R/W | R/W | |
| Reset | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | |
Bits 12:0 – ACQ[12:0] Acquisition (charge share time) Select
| Value | Description |
|---|---|
| 1111111111111 - 0000000000001 | Number of ADC clock periods in the acquisition time |
| 0000000000000 |
Acquisition time is not included in the data conversion cycle(1) |