32.8.6 ADACC

ADC Accumulator Register
See the Computation Modes table for more details.
Important: This register contains signed two’s complement accumulator value, and the upper unused bits contain copies of the sign bit.
Note:
  1. This register can only be written when GO = 0.
  2. The individual bytes in this multibyte register can be accessed with the following register names:
    • ADACCU: Accesses the upper byte ADACC[17:16]
    • ADACCH: Accesses the high byte ADACC[15:8]
    • ADACCL: Accesses the low byte ADACC[7:0]
Name: ADACC
Offset: 0x096

Bit 2322212019181716 
       ACC[17:16] 
Access R/WR/W 
Reset xx 
Bit 15141312111098 
 ACC[15:8] 
Access R/WR/WR/WR/WR/WR/WR/WR/W 
Reset xxxxxxxx 
Bit 76543210 
 ACC[7:0] 
Access R/WR/WR/WR/WR/WR/WR/WR/W 
Reset xxxxxxxx 

Bits 17:0 – ACC[17:0] ADC Accumulator - Signed two’s complement

This register can only be written when GO = 0. The individual bytes in this multibyte register can be accessed with the following register names: ADACCU: Accesses the upper byte ADACC[17:16] ADACCH: Accesses the high byte ADACC[15:8] ADACCL: Accesses the low byte ADACC[7:0]