27.4.4.5 CCP External Input Source Mode

The External Input Source mode is selected when:

  • CCM = 0
  • MOD[3:0] = 1111
  • T32 = x

The External Input Source mode is provided to bypass all Output Compare signal generation logic in the CCP module. This allows an external signal to be connected to the output control block to create complementary signals, provide Auto-shutdown control, and so on.

The module timebase operates in 16-bit mode for the External Input mode and timebase interrupts are generated. If the timebase is self-synchronized, the count period is set by the CCPxPR register. The CCPxRA and CCPxRB registers have no effect on the timebase operation for this mode.

The timebase remains operational in External Input mode so certain features of the output control logic can continue to operate. For example, these features must have a timebase period reference:

  • The automatic restart feature of the auto-shutdown logic (PWMRSEN = 1) requires a timer synchronization signal to operate properly.
  • The Auto-Shutdown Gated Mode (ASDGM = 1) requires a timebase synchronization signal.

If the timebase is not used for synchronization purposes in the External Input mode, then it can be used as a general purpose 16-bit timer to provide periodic CPU interrupts. The external signal input source can be one of the signals connected to the Input Capture source and is selected using the ICS[2:0] (CCPxCON2[18:16]) control bits.

The external signal will be synchronized to the CCP timebase clock source and therefore must meet certain timing requirements. Specifically, the high and low times for the external signal must be no less than one timer clock period.

Note: If the Input Capture pin (ICx) is located on the same pin as one of the Output Compare pins of the same module, and if the ICx pin is enabled as the External Input signal source, to avoid unexpected results, the user should not enable the ICx pin and the OCx pin simultaneously. To avoid this condition, the user should select an alternate input using the ICS[2:0] control bits.