27.4.4.1 CCP Single Edge Output Compare Mode
When MOD[3:0] =
0001, 0010 or 0011,
the selected Output Compare channel is configured for these Single Output Compare Match
modes:- Compare forces pin high (MOD[3:0] =
0001) - Compare forces pin low (MOD[3:0] =
0010) - Compare toggles pin (MOD[3:0] =
0011)
In Single Compare mode, the CCPxRA register is used. The register is loaded with a value and is compared to the module Timer register. A CPU interrupt is generated on each compare event.
Single Edge Compare mode uses these Timer/Data registers:
- CCPxTMRL as the Timer register (16-bit mode)
- CCPxTMR as the Timer register (32-bit mode)
- CCPxRA as the Compare Value register (16-bit mode)
- CCRxRB:CCPxRA as the Compare Value register (32-bit mode)
- CCPxPRL as the Timer Period register (16-bit mode only)