19.3.5 DAC Slope x Control Register
| Symbol | Description | Symbol | Description | Symbol | Description |
|---|---|---|---|---|---|
| R | Readable bit | HC | Cleared by Hardware | (Gray cell) | Unimplemented |
| W | Writable bit | HS | Set by Hardware | X | Bit is unknown at Reset |
| C | Write to clear | S | Software settable bit | x | Channel number |
| Name: | DACxSLPCON |
| Offset: | 0x1D50, 0x1D60, 0x1D70 |
| Bit | 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | |
| SLOPEN | HME | TWME | PSE | ||||||
| Access | R/W | R/W | R/W | R/W | |||||
| Reset | 0 | 0 | 0 | 0 |
| Bit | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | |
| FFSEN | |||||||||
| Access | R/W | ||||||||
| Reset | 0 |
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | |
| SLPSTOPA[3:0] | |||||||||
| Access | R/W | R/W | R/W | R/W | |||||
| Reset | 0 | 0 | 0 | 0 | |||||
| Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
| SLPSTOPB[3:0] | SLPSTRT[3:0] | ||||||||
| Access | R/W | R/W | R/W | R/W | R/W | R/W | R/W | R/W | |
| Reset | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | |
Bit 31 – SLOPEN Slope Function Enable/On bit
| Value | Description |
|---|---|
| 1 | Enables slope function |
| 0 | Disables slope function; slope accumulator is disabled to reduce power consumption |
Bit 27 – HME Hysteretic Mode Enable bit
| Value | Description |
|---|---|
| 1 | Enables Hysteretic mode for DACx |
| 0 | Disables Hysteretic mode for DACx |
Bit 26 – TWME Triangle Wave Mode Enable bit
| Value | Description |
|---|---|
| 1 | Enables Triangle Wave mode for DACx |
| 0 | Disables Triangle Wave mode for DACx |
Bit 25 – PSE Positive Slope Mode Enable bit
| Value | Description |
|---|---|
| 1 | Slope mode is positive (increasing) |
| 0 | Slope mode is negative (decreasing) |
Bit 16 – FFSEN Fast First Step Mode Enable bit
| Value | Description |
|---|---|
| 1 | Fast First Step Mode enabled |
| 0 | Fast First Step Mode disabled |