15.7.13 Peripheral Non-Secure Status - Bridge B

This register is loaded from UROW at boot.

Important: This register is only available for SAM L11 and has no effect for SAM L10.

Reading NONSEC register returns peripheral security attribution status:

Value Description
0 Peripheral is secured.
1 Peripheral is non-secured.
Name: NONSECB
Offset: 0x58
Reset: x initially determined from NVM User Row after reset
Property: Write-Secure

Bit 3130292827262524 
          
Access  
Reset  
Bit 2322212019181716 
          
Access  
Reset  
Bit 15141312111098 
          
Access  
Reset  
Bit 76543210 
    HMATRIXHSDMACNVMCTRLDSUIDAU 
Access R/R/RR/R/RR/R/RR/R/RR/R/R 
Reset xx010 

Bit 4 – HMATRIXHS Peripheral HMATRIXHS Non-Secure

Bit 3 – DMAC Peripheral DMAC Non-Secure

Bit 2 – NVMCTRL Peripheral NVMCTRL Non-Secure

The NVMCTRL Peripheral is always secured.

Bit 1 – DSU Peripheral DSU Non-Secure

The DSU Peripheral is always non-secured.

Bit 0 – IDAU Peripheral IDAU Non-Secure

The IDAU Peripheral is always secured.