15.7.8 Peripheral Interrupt Flag Status and Clear C

This flag is cleared by writing a one to the flag.

This flag is set when a Peripheral Access Error occurs while accessing the peripheral associated with the respective INTFLAGC bit, and will generate an interrupt request if INTENCLR/SET.ERR is one.

Writing a zero to this bit has no effect.

Writing a one to this bit will clear the corresponding INTFLAGC interrupt flag.

Name:	INTFLAGC
Offset:	0x1C
Reset:	0x000000
Property:	Secure


Bit	31	30	29	28	27	26	25	24

Access
Reset


Bit	23	22	21	20	19	18	17	16

Access
Reset


Bit	15	14	13	12	11	10	9	8
			TRAM	OPAMP	CCL	TRNG	PTC	DAC
Access			RW/-/RW	RW/-/RW	RW/-/RW	RW/-/RW	RW/-/RW	RW/-/RW
Reset			0	0	0	0	0	0


Bit	7	6	5	4	3	2	1	0
	ADC	TC2	TC1	TC0	SERCOM2	SERCOM1	SERCOM0	EVSYS
Access	RW/-/RW	RW/-/RW	RW/-/RW	RW/-/RW	RW/-/RW	RW/-/RW	RW/-/RW	RW/-/RW
Reset	0	0	0	0	0	0	0	0

15.7.8 Peripheral Interrupt Flag Status and Clear C

Bit 13 – TRAM Interrupt Flag for TRAM

Bit 12 – OPAMP Interrupt Flag for OPAMP

Bit 11 – CCL Interrupt Flag for CCL

Bit 10 – TRNG Interrupt Flag for TRNG

Bit 9 – PTC Interrupt Flag for PTC

Bit 8 – DAC Interrupt Flag for DAC

Bit 7 – ADC Interrupt Flag for ADC

Bits 4, 5, 6 – TC Interrupt Flag for TCn [n = 2..0]

Bits 1, 2, 3 – SERCOM Interrupt Flag for SERCOMn [n = 2..0]

Bit 0 – EVSYS Interrupt Flag for EVSYS