15.7.11 Peripheral Write Protection Status C
Reading the STATUSC register returns the peripheral write protection status:
Value | Description |
---|---|
0 | Peripheral is not write protected. |
1 | Peripheral is write protected. |
Important: For SAM
L11 Non-Secure accesses, read accesses (R*) are allowed only if the
peripheral security attribution for the corresponding peripheral is set as Non-Secured
in the NONSECx register.
Name: | STATUSC |
Offset: | 0x3C |
Reset: | 0x000000 |
Property: | Mix-Secure |
Bit | 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | |
Access | |||||||||
Reset |
Bit | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | |
Access | |||||||||
Reset |
Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | |
TRAM | OPAMP | CCL | TRNG | PTC | DAC | ||||
Access | R/R*/R | R/R*/R | R/R*/R | R/R*/R | R/R*/R | R/R*/R | |||
Reset | 0 | 0 | 0 | 0 | 0 | 0 |
Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
ADC | TC2 | TC1 | TC0 | SERCOM2 | SERCOM1 | SERCOM0 | EVSYS | ||
Access | R/R*/R | R/R*/R | R/R*/R | R/R*/R | R/R*/R | R/R*/R | R/R*/R | R/R*/R | |
Reset | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |