15.7.14.1 Physical Constraints for Quadrant Clocks

If quadrant clocks are present in a design or if it is necessary to “promote” global clocks (CLKBUF, CLKINT, PLL, CLKDLY) to quadrant clocks to satisfy the clock network resource constraints, you must define physical design constraints to execute the promotion. You may choose to create physical design constraints using PDC commands (pre-compile) or the MVN interface (post-compile).

The advantage of using the PDC flow over the MVN flow is that Compile is able to automatically promote any regular net to a global net before assigning it to a quadrant.