8.5.1 INTCON1 through INTCON4
Global interrupt control functions are controlled from INTCON1, INTCON2, INTCON3 and INTCON4.
INTCON1 contains the Interrupt Nesting Disable bit (NSTDIS), as well as the control and status flags for the processor trap sources.
The INTCON2 register controls external interrupt request signal behavior, contains the Global Interrupt Enable bit (GIE) and the Alternate Interrupt Vector Table Enable bit (AIVTEN).
INTCON3 contains the status flags for the Auxiliary PLL and
DO stack overflow status trap sources.
The INTCON4 register contains the Software Generated Hard Trap Status bit (SGHT).
