5.15.8 TEMPERATURE MONITORING AND OVERTEMPERATURE PROTECTION

If the temperature of one or more of the thermal sensors exceeds the overtemperature pre-warning threshold (T_J > T_{OT_PREW_Set}), the device will set the common pre-warning bit (OTPWS = ‘1’, see DSR1 Register) and the corresponding interrupt bits (VDD1OTPWS and/or VDD2OTPWS and/or GDUOTPWS, see DSR1 Register). An overtemperature pre-warning interrupt will be generated at the NIRQ pin when the corresponding interrupt event capture enable register is set (see SIECER1 Register). The OTPWS bit is not latched and will be set to ‘0’ as soon as the temperature of all monitored circuit parts decreases below the overtemperature protection pre-warning threshold.

If the temperature of one or more of the thermal sensors exceeds the overtemperature shutdown threshold (T_{OT_sdwn}), the overtemperature shutdown protection will be triggered for the corresponding circuit parts. This will trigger the following events:

• The integrated LIN transceiver switches into LIN Standby mode if the LIN transceiver overtemperature shutdown has been triggered.
• The VDD1 regulator is disabled if the VDD1 regulator overtemperature shutdown has been triggered.
• The VDD2 regulator, if available, is disabled when the VDD2 regulator overtemperature shutdown has been triggered.
• The GDU is switched to GDU Standby mode when the GDU overtemperature shutdown has been triggered.
• At the same time, the corresponding overtemperature shutdown interrupt register will be set (see SIR4 Register).
• NIRQ pin will be asserted.