5.15.4 VDD1/VDD2 UNDERVOLTAGE AND OVERVOLTAGE PROTECTION

The ATA6847 provides various levels of VDD1 and VDD2 undervoltage monitoring. The feature is enabled by the RSTLVL bit.

If an undervoltage event has been detected at the VDD1 or VDD2 pin, the following will happen:
  • The status bit VDDxUV (x = 1 or 2) and/or VDD1UVL (see SIR2 Register) will be set presuming the VDD1UVHECE or VDD2UVECE or VDD1UVLECE bit (see SIECER2 Register) is set to `1'.
  • The NIRQ pin will be asserted if the corresponding interrupt event capture enable register bit is set (see SIR2 Register).
  • The device will switch to MCU Reset mode, causing the GDU and the LIN transceiver to switch into GDU Standby mode.

If an overvoltage event has been detected at the VDD1 or VDD2 pin when VDDIOOVSD is '0', the following will happen:

  • The status bit VDDxOV (x = 1 or 2) (see SIR2 Register) will be set, presuming that the VDD1OVECE or VDD2OVECE bit (see SIECER2 Register) is set to ‘1’.
  • The NIRQ pin will be asserted. Setting the VDD1OVECE and/or VDD2OVECE bits to ‘0’ will disable VDD1 and/or VDD2 overvoltage event capture, respectively.

If an overvoltage event has been detected at the VDD1 or VDD2 pin for longer than the overvoltage detection debouncing time, tVDD1_OV_deb or tVDD2_OV_deb, the device is forced into Sleep mode, given that VDDIOOVSD is set to ‘1’. A number of actions are taken while switching into Sleep mode:

  • All previously captured system interrupt events are cleared before the device switches to Sleep mode.
  • Local wake up is enabled.
  • LIN wake-up is enabled.
  • Status bit SMTS is set to ‘1’ (see DSR1 Register).
  • The control register bit VDDIOOVSD (see DOPMCR Register) will be cleared, presuming the VDD1OVECE or VDD2OVECE bit is set to ‘1’.
  • The status bit VDDxOV (x = 1 or 2) (see SIR2 Register) will be set, presuming that the VDD1OVECE or VDD2OVECE bit (see SIECER2 Register) is set to ‘1’.
  • The NIRQ pin will be asserted. Setting the VDD1OVECE and/or VDD2OVECE bits to ‘0’ will disable VDD1 and/or VDD2 overvoltage event capture, respectively.