35.6.8.15 FIFO Space

Table 35-24. Register Bit Attribute Legend
SymbolDescriptionSymbolDescriptionSymbolDescription
RReadable bitHCCleared by Hardware(Grey cell)Unimplemented
WWritable bitHSSet by HardwareXBit is unknown at Reset
KWrite to clearSSoftware settable bit——
Name: FIFOSPACE
Offset: 0x34
Reset: 0x0000

Bit 15141312111098 
     RXSPACE[3:0] 
Access RRRR 
Reset 0000 
Bit 76543210 
     TXSPACE[3:0] 
Access RRRR 
Reset 0000 

Bits 11:8 – RXSPACE[3:0] RX FIFO Filled Space

These bits return the number filled locations in the RX FIFO (bytes or words, depending on CTRLC.DATA32B setting).

Note:
  1. This bit field is reset if the receiver is disable, CTRLB.RXEN = 0 or CTRLC.FIFOEN = 0.

Bits 3:0 – TXSPACE[3:0] TX FIFO Empty Space

These bits return the number of available locations in the TX FIFO (bytes or words, depending on CTRLC.DATA32B setting).

Note:
  1. The FIFO TX contents are cleared if either CTRLB.TXEN = 0 or CTRLC.FIFOEN = 0.