AXI4 Initiator/Target Interface in the RTL Interface Report

As described in 3.5.1.18 Top-Level RTL Interface, AXI4 Initiator/Target can be used for many different types of interfaces. For example, let's say we have the following top-level function:

#define SIZE 16

int top(int *arg1, int *arg2, int *arg3) {
#pragma HLS function top
#pragma HLS interface control          type(axi_target)
#pragma HLS interface argument(arg1)   type(axi_initiator) ptr_addr_interface(axi_target) num_elements(SIZE)
#pragma HLS interface argument(arg2)   type(axi_initiator) ptr_addr_interface(simple)     num_elements(SIZE)
#pragma HLS interface argument(arg3)   type(axi_target)                                   num_elements(SIZE)
    ...
}

The corresponding RTL interface report will be:

+------------------------------------------------------------------------------------------------------------------------+
| RTL Interface Generated by SmartHLS                                                                                    |
+----------+-------------------------------------+---------------------------------+------------------+------------------+
| C++ Name | Interface Type                      | Signal Name                     | Signal Bit-width | Signal Direction |
+----------+-------------------------------------+---------------------------------+------------------+------------------+
|          | Clock & Reset                       | clk (positive edge)             | 1                | input            |
|          |                                     | reset (synchronous active high) | 1                | input            |
+----------+-------------------------------------+---------------------------------+------------------+------------------+
|          | Control via AXI4 Target             | axi4target_*                    |                  |                  |
+----------+-------------------------------------+---------------------------------+------------------+------------------+
| arg1     | AXI4 Initiator                      | axi4initiator_*                 |                  |                  |
|          | with ptr_addr_interface(axi_target) | axi4target_*                    |                  |                  |
+----------+-------------------------------------+---------------------------------+------------------+------------------+
| arg2     | AXI4 Initiator                      | axi4initiator_*                 |                  |                  |
|          | with ptr_addr_interface(simple)     | arg2                            | 64               | input            |
+----------+-------------------------------------+---------------------------------+------------------+------------------+
| arg3     | AXI4 Target                         | axi4target_*                    |                  |                  |
+----------+-------------------------------------+---------------------------------+------------------+------------------+

When the top-level module uses AXI4 Initiator/Target, it will have many axi4initiator_*/axi4target_* ports respectively, with varying widths and directions. As a result, the Signal Bit-width and the Signal Direction columns for the ports are left blanked. These ports are commonly used by all AXI4 Initiator/Target interfaces of the top-level module.

In the above example:

• 3.5.1.18.1.2 AXI4 Target for Module Control is used. The Signal Name no longer shows finish, ready, and start as in the case of 3.5.1.18.1.1 Simple Module Control Interface.
• arg1 and arg2 are AXI4 Initiator Interfaces for Pointer Argument, with the pointer address interface being axi_target and simple respectively. These 2 arguments each corresponds to 2 lines in the report, one for the AXI4 Initiator argument itself and the other for the corresponding pointer address interface. Note that for the case of ptr_addr_interface(simple), the HLS module will have a simple input port with the same name as the pointer argument (in this example, the port is arg2) with a well-defined bit-width and direction (64 and input in this case).
• arg3 is an AXI4 Target Interfaces for Pointer Argument, although an argument that's 3.5.1.18.2.2 AXI4 Target for Scalar Argument will also show a similar line.