1.3.3 Supply Pins
(Ask a Question)The following table lists multiple power supply pins required for proper device operation. For more information about unused conditions and power sequence, see PolarFire SoC FPGA Board Design Guidelines User Guide.
| Name | Description | Operating Voltage |
|---|---|---|
| XCVR_VREF | Voltage reference for transceiver | 0.9V/1.25V |
| VDD_XCVR_CLK | Power for transceiver reference clock input buffers | 2.5V/3.3V |
| VDDA25 | Transceiver PLL power | 2.5V |
| VDDA | Power for transceiver Tx and Rx lanes 0, 1, 2, and 3 | 1.0V/1.05V |
| VSS | Core digital ground | NA |
| VDD | Device core digital supply | 1.0V/1.05V |
| VDDIx (JTAG Bank) | Supply for I/O circuits in a bank | 1.8V/2.5V/3.3V |
| VDDIx (GPIO Banks) | Supply for I/O circuits in a bank | 1.2V/1.5V/1.8V/2.5V/3.3V |
| VDDIx (MSSIO Banks) | Supply for MSS I/O circuits in a bank | 1.2V/1.5V/1.8V/2.5V/3.3V |
| VDDIx (MSS SGMII Banks) | Supply for MSS SGMII circuits in a bank | 2.5V/3.3V |
| VDDIx (MSS DDR Bank) | Supply for MSS DDR circuits in a bank | 1.1V1/1.2V/1.5V/1.8V |
| VDDIx (HSIO Banks) | Supply for HSIO I/O circuits in a bank | 1.2V/1.5V/1.8V |
Note:
- 1.1V is for LPDDR4 support. For more information about the board design recommendations for LPDDR4, see PolarFire Family Memory Controller User Guide.