26.8.6 CLCxSEL3
| Name: | CLCxSEL3 |
| Address: | 0xE2C,0xE36,0xE40,0xE4A,0xE54,0xE5E,0xE68,0xE72 |
| Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
| D4S[5:0] | |||||||||
| Access | R/W | R/W | R/W | R/W | R/W | R/W | |||
| Reset | x | x | x | x | x | x | |||
Bits 5:0 – D4S[5:0]
| Reset States: |
|
| Value | Description |
|---|---|
| n | Refer to CLC Input Sources for input selections |