Transfer Command Data Structure

The Transfer Command is used to initiate CCC and private transfers. For transfers with data payloads, an additional data structure (either Transfer Argument or Short Data Argument) is used to provide payload details.

Note: If a transfer consists of a payload of at least one byte, then either the Transfer Argument or the Short Data Argument must be written into the command port prior to the Transfer Command.

Table 24-3. Transfer Command Data Structure
SL No	Field Name	Bit Field	Width	Description
1	CMD_ATTR	2:0	3	Command Attribute Defines the command type and its bit field format. 4-7: Reserved 3: Address Assignment Command 2: Short Data Argument 1: Transfer Argument 0: Transfer Command
2	TID	6:3	4	Transaction ID This field is used as the identification tag for the commands. The I³C Controller returns this ID along with the response upon completion or upon error. 4'b0000 - 4'b0111 - User-Defined TID 4'b1000 - 4'b1111 - Reserved for I³C Controller
3	CMD	14:7	8	Transfer Command This field is used to define the transfer command type. The field can be programmed to: 1. 8-bit Common Command Code for CCC transfers. 2. 7-bit Command Code for HDR-DDR transfers (bit[14] is reserved).
4	CP	15	1	Command Present This bit is used to control whether the transfer should be initiated with the transfer command represented in the 'CMD' filed or not. 1 - CMD field is valid This bit is applicable for CCC and HDR transfers. 0 - CMD field is not valid
5	DEV_INDX	20:16	5	Device Index This field is used to reference the Device Address Table for getting the Target address. DEV_INDX field points to the offset address of Device Address Table.
6	SPEED	23:21	3	Speed This field is used to indicate the speed in which the transfer should be driven. Values (I3C Mode): 7: I²C FM (JEDEC broadcast CCC only) 6: HDR-DDR 5: Reserved 4: SDR4 3: SDR3 2: SDR2 1: SDR1 0: SDR0 Note that HDR-DDR is supported only if the Transfer Command Structure is set-up to use Transfer Argument and NOT Short Data Argument. Values (I²C mode): 2 -7: Reserved 1: I2C FM+ 0: I2C FM
7	RESV	24	1	Reserved
8	DBP	25	1	Defining Byte Present DBP indicates whether the current CCC command is with Defining Byte or not. This bit field is valid only when CP (command Present) bit is enabled, otherwise this bit is ignored. 1: Defining Byte is present. This bit is applicable only for Broadcast and Directed SDR CCC Transfers. 0: Defining Byte is not present.
9	ROC	26	1	Response on Completion. This field indicates whether the Response Status is required or not after the execution of this command for the successful transfer. 1 - Response Status is required. 0 - Response Status is not required. Note: The exception to the control is that the response status is generated when the transfer has encountered an error condition. Always set the ROC bit to 1 for the Read commands (RnW=1), so that the number of data received is indicated (through the DATA_LENGTH field in the Response Queue) if the Target terminates earlier than the Controller.
0	SDAP	27	1	Short Data Argument Present This field indicates whether the command written prior to the Base command should be treated as a Short Data Argument or a Transfer Argument. 1 - Prior written command is a Short Data Argument. 0 - Prior written command is a Transfer Argument.
11	RnW	28	1	Read and Write This bit controls whether a Read or Write transfer is performed. 1 - Read Transfer Note: In HDR transfers, this bit is used to set the Read/Write flag of the HDR-DDR Command Code. 0 - Write Transfer
12	TGT_RST	29	1	Target Reset Pattern Generation This bit indicates whether the issued command generates a Target Reset Pattern at the end of the transfer. This bit is enabled only with: TOC field set to 1. SPEED field set to 0 to 4. CP set to 1 CMD set to RSTACT Note: It is recommended to use this bit only for RSTACT CCC's.
13	TOC	30	1	Termination On Completion This bit controls whether a STOP needs to be issued after the completion of the transfer or not. 1 - STOP issued after this transfer. 0 - The next transfer starts with a RESTART condition.
14	PEC	31	1	Parity Error Check Enable This bit enables the generation and validation of the PEC byte for SDR CCC and private transfers. 1: PEC check is enabled. This bit is valid only for SDR Transfers and not for HDR Transfers. 0: PEC check is disabled.