31.2 UREF Control Register 1
| Name: | UREFCON |
| Offset: | 0x3B20 |
| Bit | 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | |
| Access | |||||||||
| Reset |
| Bit | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | |
| Access | |||||||||
| Reset |
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | |
| ON | INSEL[3:0] | ||||||||
| Access | R/W | R/W | R/W | R/W | R/W | ||||
| Reset | 0 | 0 | 0 | 0 | 0 | ||||
| Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
| OUTSEL[2:0] | |||||||||
| Access | R/W | R/W | R/W | ||||||
| Reset | 0 | 0 | 0 | ||||||
Bit 15 – ON Module Enable/On bit
| Value | Description |
|---|---|
| 1 | Enables module, |
| 0 | Disables module, |
Bits 11:8 – INSEL[3:0] Input Voltage Selection bits
Bits 2:0 – OUTSEL[2:0] Pad Select bits
| Value | Description |
|---|---|
| 100 | DACBUFFER 2 output |
| 010 | DACBUFFER 1 output |
| 001 | UREF output |
| 000 | UREF output disabled |
