50.5 Power-Down Current (IPD)(1, 2,3)

Table 50-3. Power Down Current
Standard Operating Conditions (unless otherwise stated)
Param. No.Sym.Device CharacteristicsMin.Typ.†Max. +85°CMax. +125°CUnitsConditions
VDDVREGPMNote
D200IPDIPD Base1.23.84.6μA3.0V'b11
D200A0.912.134μA3.0V'b10
D200B29.55670μA3.0V'b01
D200C157260275μA3.0V'b00
D201IPD_WDTLow-Frequency Internal Oscillator/WDT1.545.1μA3.0V'b11
D202*IPD_SOSCSecondary Oscillator (SOSC)2.14.87.9μA3.0V'b11SOSCPWR = 0
D203IPD_LPBORLow-Power Brown-out Reset (LPBOR)1.346μA3.0V'b11
D204IPD_FVR_BUF1FVR Buffer 1 (ADC)180281285μA3.0V'b11
D204AIPD_FVR_BUF2FVR Buffer 2 (DAC/CMP)49.48093μA3.0V'bx1 or 'b10
D205IPD_BORBrown-out Reset (BOR)172425μA3.0V'b11
D206IPD_HLVDHigh/Low Voltage Detect (HLVD)172527μA3.0V'b11
D207IPD_ADCAADC - Active483813819μA3.0V'bx1 or 'b10ADC is converting (4)
D208*IPD_CMPComparator94μA3.0V'b11SP='b00
D208A*41μA3.0V'b11SP='b01
D208B364950μA3.0V'b11SP='b10
D208C*100μA3.0V'b11SP='b11
D209IPD_OPAOperational Amplifier1.101.71.8mA3.0V'b01Charge Pump On; VICM = VDD/2

* These parameters are characterized but not tested.

† Data in “Typ.” column is at 3.0V, 25°C unless otherwise stated. These parameters are for design guidance only and are not tested.

Note:
  1. The peripheral current is the sum of the IPD base and the additional current consumed when this peripheral is enabled. The peripheral ∆ current can be determined by subtracting the base IDD or IPD current from this limit. Max. values may be used when calculating total current consumption.
  2. The power-down current in Sleep mode does not depend on the oscillator type. Power-down current is measured with the part in Sleep mode with all I/O pins in High Impedance state and tied to VSS or all pins driven low.
  3. All peripheral currents listed are on a per-peripheral basis if more than one instance of a peripheral is available.
  4. ADC clock source is ADCRC.