35.17.34 PMC Generic Clock Status Register 1
The following configuration values are valid for all listed bit names of this
register:
0: The corresponding generic clock is disabled.
1: The corresponding generic clock is enabled.
Name: | PMC_GCSR1 |
Offset: | 0x00C4 |
Reset: | 0x00000000 |
Property: | Read-only |
“PIDx” refers to
identifiers as defined in the table “Peripheral Identifiers".
Bit | 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | |
| GPID63 | GPID62 | GPID61 | | | GPID58 | GPID57 | | |
Access | R | R | R | | | R | R | | |
Reset | 0 | 0 | 0 | | | 0 | 0 | | |
Bit | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | |
| | GPID54 | GPID53 | GPID52 | GPID51 | | GPID49 | GPID48 | |
Access | | R | R | R | R | | R | R | |
Reset | | 0 | 0 | 0 | 0 | | 0 | 0 | |
Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | |
| GPID47 | GPID46 | GPID45 | GPID44 | GPID43 | GPID42 | GPID41 | GPID40 | |
Access | R | R | R | R | R | R | R | R | |
Reset | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | |
Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
| GPID39 | GPID38 | | | | | GPID33 | | |
Access | R | R | | | | | R | | |
Reset | 0 | 0 | | | | | 0 | | |
Bits 29, 30, 31 – GPIDx Generic Clock x Status
Bits 25, 26 – GPIDx Generic Clock x Status
Bits 19, 20, 21, 22 – GPIDx Generic Clock x Status
Bits 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17 – GPIDx Generic Clock x Status
Bit 1 – GPIDx Generic Clock x Status