35.17.34 PMC Generic Clock Status Register 1

The following configuration values are valid for all listed bit names of this register:

0: The corresponding generic clock is disabled.

1: The corresponding generic clock is enabled.

Name: PMC_GCSR1
Offset: 0x00C4
Reset: 0x00000000
Property: Read-only

“PIDx” refers to identifiers as defined in the table “Peripheral Identifiers".

Bit 3130292827262524 
 GPID63GPID62GPID61  GPID58GPID57  
Access RRRRR 
Reset 00000 
Bit 2322212019181716 
  GPID54GPID53GPID52GPID51 GPID49GPID48 
Access RRRRRR 
Reset 000000 
Bit 15141312111098 
 GPID47GPID46GPID45GPID44GPID43GPID42GPID41GPID40 
Access RRRRRRRR 
Reset 00000000 
Bit 76543210 
 GPID39GPID38    GPID33  
Access RRR 
Reset 000 

Bits 29, 30, 31 – GPIDx Generic Clock x Status

Bits 25, 26 – GPIDx Generic Clock x Status

Bits 19, 20, 21, 22 – GPIDx Generic Clock x Status

Bits 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17 – GPIDx Generic Clock x Status

Bit 1 – GPIDx Generic Clock x Status