4.9.6.5.1 MCUCR – MCU Control Register
| Name: | MCUCR |
| Offset: | 0x00E |
| Reset: | 0x00 |
| Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
| | PB7HS | PB7LS | PB4HS | PUD | ENPS | SPIIO | IVWEL | IVCE | |
| Access | R/W | R/W | R/W | R/W | R/W | R/W | R/W | R/W | |
| Reset | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | |
Bit 7 – PB7HS Port B7 High-Side Driver Enable
Enables the strong high-side driver on PB7. It can be used to supply an external LNA preamplifier connected to ground. The driver provides a switchable connection to the supply voltage.
Bit 6 – PB7LS Port B7 Low-Side Driver Enable
Enables the strong low-side driver on PB7. It can be used to drive an LED connected to supply. The driver provides a switchable connection to ground.
Bit 5 – PB4HS Port B4 High-Side Driver Enable
Enables the strong high-side driver on PB4. It can be used to supply an external LNA preamplifier connected to ground. The driver provides a switchable connection to the supply voltage.
Bit 4 – PUD Pull-up Resistors Disable
When this bit is written to
‘1’, the pull-ups in the I/O ports are disabled even if the
DDxn and PORTxn registers are configured to enable the pull-ups ({DDxn, PORTxn} =
0b01). For details about this feature, see Ports as General Digital I/O from
Related Links.
Bit 3 – ENPS Enable Port Settings
Activates the register-defined port
settings. If this bit is ‘0’, hardwired settings, see PORTB
OFFMode Configuration and PORTC OFFMode Configuration in the
Alternate Port Functions from Related Links, are used as the
default.
Bit 2 – SPIIO
For a description of this bit, see
Reset and Interrupt Handling from Related Links.
Bit 1 – IVWEL
For a description of this bit, see
Reset and Interrupt Handling from Related Links.
Bit 0 – IVCE
For a description of this bit, see
Reset and Interrupt Handling from Related Links.
