19.3.1 Design Flow

The following steps are used to enable the WatchDog Timer in the application:

  1. Enable the watchdog timer by using the MSS configurator in the application, as shown in the following figure.
    Figure 19-4. Enabling Watchdog Timer in the Libero SOC Design MSS Configurator
  2. Clicking Watchdog Timer displays the watchdog timer configuration window, as shown in the following figure.
    Figure 19-5. Watchdog Timer Configuration Window
    • Timeout behavior: The watchdog timer default setting is reset generation on timeout. When interrupt generation is selected, the WDOGTIMEOUTINT output is asserted on timeout and remains asserted until the interrupt is cleared
    • Interrupt Port: This feature has been de-featured. The user can expose the interrupt by exposing the NMI via the interrupt Manager block.
    • Refresh Count: Use the Refresh Count option to set the WDOGLOAD register value (Flash Bits) at POR or when the device is reset (DEVRST_N is asserted/de-asserted). Refresh Count value should be higher or equal to the default value, which is 0x1800000.
    • Counter Threshold: Use the Counter Threshold option to set the value for WDOGMVRP System register. It is possible to avoid having forbidden and permitted windows by ensuring that the value in the WDOGMVRP is greater than the value in the WDOGLOAD. See 19.2.3.1 Loading and Refreshing the Watchdog Timer for a detailed description of forbidden and permitted windows.
  3. The watchdog timer signals in top level instance are shown in the following figure.
    Figure 19-6. Watchdog Timer Signals
  4. Generate the component by clicking Generate Component or by selecting SmartDesign > Generate Component. For more information on generation of the component, see the latest SmartDesign user guide on Libero SoC Documentation. The firmware driver folder and SoftConsole workspace is included in the project. Click the highlighted Configure firmware button as shown in the following figure to find the watchdog timer drivers.
    Figure 19-7. RTC Driver User Guide
  5. Click Generate Bitstream under Program Design to complete *.fdb file generation.
  6. Double-click Export Firmware under Handoff Design for Firmware Development in the Libero SoC design flow window to generate the SoftConsole Firmware Project. The SoftConsole folder contains the mss_watchdog firmware driver. The firmware driver, mss_watchdog (mss_watchdog.h), which provides a set of functions for controlling the watchdog timer can also be downloaded from the Microchip firmware catalog. The following table lists the APIs for Watchdog Timer.
 For more information on the APIs, see the SmartFusion2_MSS_Watchdog_Driver_UG.
    Table 19-2. Watchdog Timer APIs
    CategoryAPIDescription and Usage
    InitializationMSS_WD_init()Initializes Watchdog Timer
    Reading the watchdog timer current value and statusMSS_WD_current_value()Returns the current value of the watchdog's down counter
    MSS_WD_status()Returns the status of the watchdog
    Refreshing the watchdog timer valueMSS_WD_reload()Causes the watchdog to reload its down counter timer with the load value
    MSS_WD_timeout_occured()Reports the occurrence of a timeout event
    MSS_WD_clear_timeout_event()Clears the hardware's report of a time out event
    Time-out and wake-up interrupts controlMSS_WD_enable_timeout_irq()Enables the watchdog’s time out interrupt
    MSS_WD_disable_timeout_irq()Disables the generation of the NMI interrupt
    MSS_WD_enable_wakeup_irq()Enables the SmartFusion 2 wakeup interrupt
    MSS_WD_clear_wakeup_irq()Clears the wakeup interrupt
    MSS_WD_disable_wakeup_irq()Disables the SmartFusion 2 wakeup interrupt
    MSS_WD_clear_timeout_irq()Clears the watchdog’s time out interrupt
  7. For more information on Watchdog usage, the sample projects are available and can be generated, as shown in the following figure.
    Figure 19-8. Watchdog Timer Examples