The Cortex-M3 processor sets the ENS1 and STA bits of the Control register.
The I2C peripheral sends a START condition and then
generates an interrupt request, (STATUS register = 0x08).
The Cortex-M3 processor writes to the data register (7-bit slave address and direction
bit) and then clears the serial interrupt (SI) bit in the Control register.
The I2C peripheral sends the data register contents and
then generates the interrupt request.
The Status register contains a value of
0x18 or 0x20, depending on the received ACK bit (Table 14-8).
The transfer is continued according to
the STATUS Register – Master-Transmitter mode.
The online versions of the documents are provided as a courtesy. Verify all content and data in the device’s PDF documentation found on the device product page.
