8.5 SYSREG Control Registers
In addition to the specific PDMA registers found in Table 8-4, the registers found in the following table also control the behavior of the PDMA peripheral. These registers are described in System Register Block and are listed in the following table for convenience. For a detailed description of each register and associated bits, see Peripheral DMA.
| Register Name | Register Type | Flash Write Protect | Reset Source | Description |
|---|---|---|---|---|
| Software Reset Control Register | RW-P | Bit | SYSRESET_N | Soft reset control |
| Master Weight Configuration Register 1 | RW-P | Register | SYSRESET_N | Configures weighted round robin master arbitration scheme for masters. |