31.8.100 ETH PTP Peer Event Frame Transmitted Nanoseconds Register

Table 31-115. Register Bit Attribute Legend
Symbol Description Symbol Description Symbol Description
R Readable bit HC Cleared by Hardware (Grey cell) Unimplemented
W Writable bit HS Set by Hardware X Bit is unknown at Reset
K Write to clear S Software settable bit
Name: PEFTN
Offset: 0x11F4
Reset: 0x00000000
Property: -

Bit 3130292827262524 
   RUD[29:24] 
Access RRRRRR 
Reset 000000 
Bit 2322212019181716 
 RUD[23:16] 
Access RRRRRRRR 
Reset 00000000 
Bit 15141312111098 
 RUD[15:8] 
Access RRRRRRRR 
Reset 00000000 
Bit 76543210 
 RUD[7:0] 
Access RRRRRRRR 
Reset 00000000 

Bits 29:0 – RUD[29:0] Register Update

The register is updated with the value that the 1588 Timer Nanoseconds Register holds when the SFD of a PTP transmit peer event crosses the MII interface. An interrupt is issued when the register is updated.