31.8.112 ETH Screening Type 2 Register x Priority Queue
Screening type 2 registers are used to allocate up to 6 priority queues to received frames based on the VLAN priority field of received Ethernet frames.
Symbol | Description | Symbol | Description | Symbol | Description |
---|---|---|---|---|---|
R | Readable bit | HC | Cleared by Hardware | (Grey cell) | Unimplemented |
W | Writable bit | HS | Set by Hardware | X | Bit is unknown at Reset |
K | Write to clear | S | Software settable bit | — | — |
Name: | SCRT2 |
Offset: | 0x1540 + n*0x04 [n=0..7] |
Reset: | 0x00000000 |
Property: | Read/Write |
Bit | 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | |
COMPCE | COMPC[4:0] | COMPBE | |||||||
Access | R/W | R/W | R/W | R/W | R/W | R/W | R/W | ||
Reset | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
Bit | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | |
COMPB[4:0] | COMPAE | COMPA[4:3] | |||||||
Access | R/W | R/W | R/W | R/W | R/W | R/W | R/W | R/W | |
Reset | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | |
COMPA[2:0] | ETHE | I2ETH[2:0] | VLANE | ||||||
Access | R/W | R/W | R/W | R/W | R/W | R/W | R/W | R/W | |
Reset | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
VLANP[2:0] | QNB[2:0] | ||||||||
Access | R/W | R/W | R/W | R/W | R/W | R/W | |||
Reset | 0 | 0 | 0 | 0 | 0 | 0 |
Bit 30 – COMPCE Compare C Enable
Value | Description |
---|---|
0 | Compare C is disabled. |
1 | Comparison via the register designated by index COMPC is enabled. |
Bits 29:25 – COMPC[4:0] Index of Screening Type 2 Compare Word 0/Word 1 register x
COMPC is a pointer to the compare registers SCRT2CMP0 and SCRT2CMP1. When COMPCE=1, the compare is true if the data at the frame offset ANDed with the value MASKVAL is equal to the value of COMPVAL ANDed with the value of MASKVAL.
Bit 24 – COMPBE Compare B Enable
Value | Description |
---|---|
0 | Compare B is disabled. |
1 | Comparison via the register designated by index COMPB is enabled. |
Bits 23:19 – COMPB[4:0] Index of Screening Type 2 Compare Word 0/Word 1 register x
COMPB is a pointer to the compare registers SCRT2CMP0 and SCRT2CMP1. When COMPBE=1, the compare is true if the data at the frame offset ANDed with the value MASKVAL is equal to the value of COMPVAL ANDed with the value of MASKVAL.
Bit 18 – COMPAE Compare A Enable
Value | Description |
---|---|
0 | Compare A is disabled. |
1 | Comparison via the register designated by index COMPA is enabled. |
Bits 17:13 – COMPA[4:0] Index of Screening Type 2 Compare Word 0/Word 1 register x
COMPA is a pointer to the compare registers SCRT2CMP0 and SCRT2CMP1. When COMPAE=1, the compare is true if the data at the frame offset ANDed with the value MASKVAL is equal to the value of COMPVAL ANDed with the value of MASKVAL.
Bit 12 – ETHE EtherType Enable
Value | Description |
---|---|
0 | EtherType match is disabled |
1 | EtherType match with bits [15:0] of the register designated by the value in I2ETH is enabled |
Bits 11:9 – I2ETH[2:0] Index of Screening Type 2 EtherType register x
When EtherType is enabled (ETHE=1), the EtherType field (last EtherType in the header if the frame is VLAN-tagged) is compared with bits [15:0] in the register designated by the value of this bit field.
Bit 8 – VLANE VLAN Enable
Value | Description |
---|---|
0 | VLAN match disabled |
1 | VLAN match is enabled |
Bits 6:4 – VLANP[2:0] VLAN Priority
When VLAN match is enabled (VLANE=1), the VLAN Priority field of the received frame is matched against the value of this bit field.
Bits 2:0 – QNB[2:0] Queue Number
If a match is successful, then the queue value programmed in QNB is allocated to the frame.