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10.1.6 FPRxST Configuration Register
Table 10-10. Register Bit Attribute Legend Symbol Description Symbol Description Symbol Description R Readable
bit HC Cleared by
Hardware (Gray
cell) Unimplemented W Writable
bit HS Set by
Hardware X Bit is unknown
at Reset C Write to
clear S Software
settable bit x Channel
number
Name: FPRxST Offset: 0x7F4004, 0x7F4014,
0x7F4024, 0x7F4034, 0x7F4044, 0x7F4054, 0x7F4064, 0x7F4074
Bit 31 30 29 28 27 26 25 24 Access Reset
Bit 23 22 21 20 19 18 17 16 START[22:16] Access R/W R/W R/W R/W R/W R/W R/W Reset 1 1 1 1 1 1 1
Bit 15 14 13 12 11 10 9 8 START[15:12] START[11:8] Access R/W R/W R/W R/W R R R R Reset 1 1 1 1 0 0 0 0
Bit 7 6 5 4 3 2 1 0 START[7:0] Access R R R R R R R R Reset 0 0 0 0 0 0 0 0
Bits 22:16 – START[22:16] Start Address Offset MSb bits Protection region start address
offset
Bits 15:12 – START[15:12] Start Address Offset
MSb bits Protection region start address
offset
Bits 11:0 – START[11:0] Start Address Offset LSb
bits Protection region start
address offset, fixed value 0x0
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