10.1.5 FPRxCTRL Configuration Register

Table 10-9. Register Bit Attribute Legend
Symbol	Description	Symbol	Description	Symbol	Description
R	Readable bit	HC	Cleared by Hardware	(Gray cell)	Unimplemented
W	Writable bit	HS	Set by Hardware	X	Bit is unknown at Reset
C	Write to clear	S	Software settable bit	x	Channel number

Name:	FPRxCTRL
Offset:	0x7F4000, 0x7F4010, 0x7F4020, 0x7F4030, 0x7F4040, 0x7F4050, 0x7F4060, 07F4070


Bit	31	30	29	28	27	26	25	24

Access
Reset


Bit	23	22	21	20	19	18	17	16

Access
Reset


Bit	15	14	13	12	11	10	9	8
			Reserved[1:0]				RTYPE[1:0]
Access			R/W	R/W			R/W	R/W
Reset			1	1			1	1


Bit	7	6	5	4	3	2	1	0
	CRC	WR	RD	EX			ERAO	RDIS
Access	R	R/W	R/W	R/W			R/W	R/W
Reset	0	1	1	1			1	1

Bits 13:12 – Reserved[1:0] Maintain as '11'

Bits 9:8 – RTYPE[1:0] Region Type bits

Value	Description
11	Firmware Configurable Region
10	One Time Programmable (OTP) Region
01	Immutable Root of Trust (IRT) Region
00	Reserved

Bit 7 – CRC Flash CRC Permission bit

Value	Description
1	Flash CRC calculation permitted
0	Flash CRC calculation not permitted

Bit 6 – WR Write Permission bit

Value	Description
1	Write (program/erase) permitted
0	Write (program/erase) not permitted

Bit 5 – RD Read Permission bit

Value	Description
1	Read (data read) permitted
0	Read (data read) not permitted

Bit 4 – EX Execute Permission bit

Value	Description
1	Execute (instruction fetch) permitted
0	Execute (instruction fetch) not permitted

Bit 1 – ERAO ECC Report Address Only on ECC Error bit

Value	Description
1	ECC error reporting information restricted to address only
0	No ECC error reporting restrictions

Bit 0 – RDIS Region Disable bit

Value	Description
1	Region disabled
0	Region enabled

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