10.1.7 FPRxEND Configuration Register Table 10-11. Register Bit Attribute LegendSymbolDescriptionSymbolDescriptionSymbolDescriptionRReadable bitHCCleared by Hardware(Gray cell)UnimplementedWWritable bitHSSet by HardwareXBit is unknown at ResetCWrite to clearSSoftware settable bitxChannel number Name: FPRxENDOffset: 0x7F4008, 0x7F4018, 0x7F4028, 0x7F4038, 0x7F4048, 0x7F4058, 0x7F4068, 0x7F4078Bit 3130292827262524 Access Reset Bit 2322212019181716 END[22:16] Access RRRRRRR Reset 1111111 Bit 15141312111098 END[15:8] Access RRRRRRRR Reset 11111111 Bit 76543210 END[7:0] Access RRRRRRRR Reset 11111111 Bits 22:16 – END[22:16] Bits 15:8 – END[15:8] Bits 7:0 – END[7:0] End Address Offset LSb bitsProtection region end address offset (least significant bits) fixed value 0xFFF
Bit 3130292827262524 Access Reset Bit 2322212019181716 END[22:16] Access RRRRRRR Reset 1111111 Bit 15141312111098 END[15:8] Access RRRRRRRR Reset 11111111 Bit 76543210 END[7:0] Access RRRRRRRR Reset 11111111
Bits 7:0 – END[7:0] End Address Offset LSb bitsProtection region end address offset (least significant bits) fixed value 0xFFF
