29.4.6.2.4 Mode 3: PTGITM[1:0] = 0b11 (Sampled Level Detect without Step Delay at Exit)

In this mode, the selected trigger input is sample tested for a valid level immediately after the PTGWHI or PTGWLO command is executed; the trigger input is tested (once per PTG clock).

If the trigger does not occur and the step delay is enabled, the command waits for the step delay to expire before testing the trigger input again. When the trigger is found to be true, the command execution completes and execution of the subsequent command will commence immediately. The step delay is not inserted.

If the trigger does not occur and the step delay is disabled, the command immediately tests the trigger input again during the next PTG clock cycle. When the trigger occurs, the command execution completes and execution of the subsequent command will commence immediately.

Note:
  1. As this operating mode is level-sensitive, if the input trigger level is true at the start of execution of the PTGWHI or PTGWLO command, the input test will be instantly satisfied.
  2. The input is not latched, therefore, it must be valid when the command executes in order to be recognized.

Figure 29-6 shows an example timing diagram of Mode 3 operation.

Figure 29-6. Operation of Level-Sensitive Command without Exit Step Delay