14.11.3 Clock Buffers

Names for the input buffers are composed of up to 3 parts:

  • A base name indicating the type of buffer: CLKBUF
  • IO Technology like LVCMOS
  • An optional number code 33,25,18 or 15 indicating a 3.3,2.5, 1.8 OR 1.5 voltage level

CLKBUF_X

This component is supported by Accelerator families.

Figure 14-500. CLKBUF_X Logic Diagram
  • Function: Input for Dedicated Routed Clock Network
  • Input: PAD
  • Output: Y
Table 14-917. Truth Table
PADY
00
11
Table 14-918. Truth Table
FamilySeqI/O
All—1
Table 14-919. Available CLKBUF_X Macro Types
NameDescription
CLKBUF_LVCMOS25LVCMOS Clock buffer with 2.5 CMOS voltage level
CLKBUF_LVCMOS18LVCMOS Clock buffer with 1.8 CMOS voltage level
CLKBUF_LVCMOS15LVCMOS Clock buffer with 1.5 CMOS voltage level
CLKBUF_PCIPCI Clock buffer
CLKBUF_PCIXPCIX Clock buffer
CLKBUF_GTLP25GTLP Clock buffer with 2.5 CMOS voltage level
CLKBUF_GTLP33GTLP Clock buffer with 3.3 CMOS voltage level
CLKBUF_ HSTL _IHSTL Class I Clock buffer
CLKBUF_SSTL2_ISSTL2 Class I Clock buffer
CLKBUF_SSTL2_IISSTL2 Class II Clock buffer
CLKBUF_SSTL3_ISSTL3 Class I Clock buffer
CLKBUF_SSTL3_IISSTL3 Class II Clock buffer