10.2.9.1 ProASICPLUS® PLL I/O Description
The following table lists the I/O description of a ProASICPLUS PLL.
| Name | Size | Type | Required/Optional | Function |
|---|---|---|---|---|
| GLA | 1 | Output | Optional | Secondary clock output |
| GLB | 1 | Output | Required | Primary clock output |
| LOCK | 1 | Output | Required | PLL Lock |
| SDOUT | 1 | Output | Required | Output of serial interface shift register |
| CLK | 1 | Input | Required | Input clock for primary clock |
| CLKA | 1 | Input | Optional | Input clock for secondary clock. Valid only in Bypass Mode |
| EXTFB | 1 | Input | Optional | External Feedback |
| SCLK | 1 | Input | Optional | Shift Clock (Only Dynamic Mode) |
| SSHIFT | 1 | Input | Optional | Serial Shift enable (Only Dynamic Mode) |
| SDIN | 1 | Input | Optional | Serial Data in for PLL configuration bits (Only Dynamic Mode) |
| SUPDATE | 1 | Input | Optional | Serial Update (Only Dynamic Mode) |
| MODE | 1 | Output | Optional | Dynamic or Static mode indicator |
