27.1.1 Op Amp Control Register Low
| Name: | AMPCON1L |
| Offset: | 0x8DC |
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | |
| AMPON | |||||||||
| Access | R/W | ||||||||
| Reset | 0 |
| Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
| AMPEN3 | AMPEN2 | AMPEN1 | |||||||
| Access | R/W | R/W | R/W | ||||||
| Reset | 0 | 0 | 0 |
Bit 15 – AMPON Op Amp Enable/On bit
| Value | Description |
|---|---|
1 |
Enables op amp modules if their respective AMPENx bits are also asserted |
0 |
Disables all op amp modules |
Bit 2 – AMPEN3 Op Amp #3 Enable bit
| Value | Description |
|---|---|
1 |
Enables Op Amp #3 if the AMPON bit is also asserted |
0 |
Disables Op Amp #3 |
Bit 1 – AMPEN2 Op Amp #2 Enable bit
| Value | Description |
|---|---|
1 |
Enables Op Amp #2 if the AMPON bit is also asserted |
0 |
Disables Op Amp #2 |
Bit 0 – AMPEN1 Op Amp #1 Enable bit
| Value | Description |
|---|---|
1 |
Enables Op Amp #1 if the AMPON bit is also asserted |
0 |
Disables Op Amp #1 |
