27.1.2 Op Amp Control Register High
| Name: | AMPCON1H |
| Offset: | 0x8DE |
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | |
| Access | |||||||||
| Reset |
| Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
| NCHDIS3 | NCHDIS2 | NCHDIS1 | |||||||
| Access | R/W | R/W | R/W | ||||||
| Reset | 0 | 0 | 0 |
Bit 2 – NCHDIS3 Op Amp #3 N Channel Disable bit
| Value | Description |
|---|---|
1 |
Disables Op Amp #3 N channels input stage; reduced INL, but lowered input voltage range |
0 |
Wide input range for Op Amp #3 |
Bit 1 – NCHDIS2 Op Amp #2 N Channel Disable bit
| Value | Description |
|---|---|
1 |
Disables Op Amp #2 N channels input stage; reduced INL, but lowered input voltage range |
0 |
Wide input range for Op Amp #2 |
Bit 0 – NCHDIS1 Op Amp #1 N Channel Disable bit
| Value | Description |
|---|---|
1 |
Disables Op Amp #1 N channels input stage; reduced INL, but lowered input voltage range |
0 |
Wide input range for Op Amp #1 |