3.10.4.4.6 CMOCR – Clock
Management Override Control Register
Name: | CMOCR |
Offset: | 0x0C9 |
Reset: | 0x00 |
Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
| | | | | SRCACT | FRCACT | SRCAO | FRCAO | |
Access | R | R | R | R | R | R | R/W | R/W | |
Reset | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | |
Bit 7 – Reserved
Bit
This bit is reserved and read
as ‘0
’.
Bit 6 – Reserved
Bit
This bit is reserved and read
as ‘0
’.
Bit 5 – Reserved Bit
This bit is reserved and read
as ‘0
’.
Bit 4 – Reserved Bit
This bit is reserved and read
as ‘0
’.
Bit 3 – SRCACT SRC Oscillator
Active
This bit indicates that the
SRC oscillator is enabled and active if read as ‘1
’. If this bit is
read as ‘1
’, the SRC is either disabled or enabled but not
active.
Bit 2 – FRCACT FRC Oscillator Active
This bit indicates that the
FRC oscillator is enabled and active if read as ‘1
’. If this bit is
read as ‘0
’, the FRC is either disabled or enabled but not
active.
Bit 1 – SRCAO SRC Oscillator Always On
If set to
‘1
’, this bit enables the SRC oscillator independently of the
enabled hardware features.
Bit 0 – FRCAO FRC Oscillator Always On
If set to
‘1
’, this bit enables the FRC oscillator independently of the
enabled hardware features.