2.2.2.5 Polling Configuration
During polling configuration, the firmware configures the polling timer and copies an initial polling array from the EEPROM to the SRAM.
Timer1 is used as the polling timer. The EEPROM variables eepPollLoopConf.ConfT1COR and eepPollLoopConf.confT1MR allow configuration of the clock source and the polling cycle time.
Address | Name | Bit 7 | Bit 6 | Bit 5 | Bit 4 | Bit 3 | Bit 2 | Bit 1 | Bit 0 |
---|---|---|---|---|---|---|---|---|---|
0x0099 | confT1COR | T1COR[7:0] | |||||||
0x009A | confT1MR | T1DC[1:0] | T1PS[3:0] | T1CS[1:0] |
The polling array contains configurations for 16 service/channel settings with two bytes of configuration data for each. It is located in the EEPROM variables eepPollLoopConf.pollLoopConf[15:0].config and eepPollLoopConf.pollLoopConf[15:0].svcChConfig. For more information, see sEEPromPollLoopConf eepPollLoopConf.
Address | Name | Bit 7 | Bit 6 | Bit 5 | Bit 4 | Bit 3 | Bit 2 | Bit 1 | Bit 0 |
---|---|---|---|---|---|---|---|---|---|
0x009B | pollLoopConf[0].config | RfCalib | — | VCOtune | — | — | — | EOL | EOP |
0x009C | pollLoopConf[0].svcChConfig | enaPathB | enaPathA | Ch[1:0] | — | Ser[2:0] | |||
... | ... | ... | ... | ... | ... | ... | ... | ... | ... |
0x00B9 | pollLoopConf[15].config | RfCalib | — | VCOtune | — | — | — | EOL | EOP |
0x00BA | pollLoopConf[15].svcChConfig | enaPathB | enaPathA | Ch[1:0] | — | Ser[2:0] |
For more information about the polling mode, see PollingMode.