2.2.2.12 Power Supply Settings

The ATA8510/15 can be operated by a wide range of supply voltages from VS = 1.9-5.5V.

Provide supply voltage directly to the power amplifier (PA) via pin 8/VS_PA up to a maximum voltage of 3.6V (3V application). If the ATA8510/15 is driven by a higher voltage, the PA must be supplied from pin 13/VS over an internal LDO regulator (5V application). In this case VS_PA is a regulator output and instead of the external supply, connect a 68 nF blocking capacitor to ground. Activate the internal regulator by setting the EEPROM variable eepTrxConf.sysConfig.VS5V to ‘1’.

In addition, configure the internal regulator for a PA supply voltage of only 2.2V by setting the eepTrxConfig.sysConfig.VS22V variable to ‘1’. This mode leads, for example, in battery-driven 3V applications, to a reduced but constant PA output power even when the battery gets weak. The following figure illustrates the PA supply options.
Figure 2-6. Power Amplifier Supply Options

A built-in voltage monitor can be enabled by setting the EEPROM variable eepConfValid.confVMCSR.VMIM to ‘1’. If the supply voltage drops below the threshold that is configured in eepConfValid.confVMCSR.VMLS[3:0], the event flag “LOWBATT” is raised in the event byte “system”. This can be suppressed by setting the EEPROM variable eepTrxConf.sysConfig.LOWBATTdisable to ‘1’.

If the analog voltage (AVCC) drops below a certain threshold voltage (typically 100 mV below the nominal AVCC voltage), the event flag “AVCCLOW” is raised in the event byte “system”. This can be suppressed by setting the EEPROM variable eepTrxConf.sysConfig.AVCCdisable to ‘1’.

For more information, see sEEPromTrxConfig eepTrxConf, sEEPromConfigValid eepConfValid and Power Management.

Address Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
0x0017 sysConfig VS22V VS5V SFIFO_OFL_UFL_RX_disable DFIFO_OFL_UFL_RX_disable AVCC disable LOWBATT disable
0x000A confVMCSR VMF VMIM VMLS[3:0]