13.19.4 Power Control Status (PCON)
The PCON[2:0] (STAT0[7:5]) bits are Power Control status bits that may be used to determine the cause of a shutdown. They are not Fault latches. The HVDD Overvoltage Shutdown Fault is an internally latched Fault that does not have a latched FAULT bit in the STAT0 or STAT1 register. That is because the device will be shut down immediately upon entering the Overvoltage Fault condition. When power is back within the device operating range, and the VREG supply is re-enabled, the Host will be able to read the STAT0 register to determine the reason for a power cycle. The PCON power status bits will contain the cause of the power cycle. Table 13-4 lists the Power Status register bits in the STAT0 register.
| PCON[2:0] Status Bits (STAT0[7:5]) | DE2 Message |
|---|---|
Overtemperature Shutdown (OTSHDN) occurred | 0x85 0xA0 |
HVDD Overvoltage Shutdown (OVSHDN) occurred | 0x85 0x80 |
Sleep occurred | 0x85 0x60 |
HVDD Undervoltage Shutdown (UVSHDN) occurred | 0x85 0x40 |
Power-on Reset (POR) occurred | 0x85 0x20 |
Normal operation | 0x85 0x00 |
