26.6.13 ECC Fault Injection Control

Note: This Register is only available on PIC32CM5164 and PIC32CM2532 variants.

Name:	FLTCTRL
Offset:	0x84
Reset:	0x00000000
Property:	PAC Write-Protection


Bit	31	30	29	28	27	26	25	24

Access
Reset


Bit	23	22	21	20	19	18	17	16

Access
Reset


Bit	15	14	13	12	11	10	9	8
		FLTMD[2:0]
Access		R/W	R/W	R/W
Reset		0	0	0


Bit	7	6	5	4	3	2	1	0
							FLTEN	FLTRST
Access							R/W	R/W
Reset							0	0

Bits 14:12 – FLTMD[2:0] Fault Mode Control

When FLTEN has previously been written to 1, any write attempt to this bit field will fail and return a bus error.

Value	Description
0x0	Fault Injection is disabled
0x1	Reserved
0x2	Fault Capture Mode enabled
0x3	Reserved
0x4	Single Fault Injection (at bit selected in FLT1PTR) for Reads
0x5	Double Fault Injection (at bit selected in FLT1PTR and FLT2PTR) for Reads
0x6	Single Fault Injection (at bit selected in FLT1PTR) for Writes
0x7	Double Fault Injection (at bit selected in FLT1PTR and FLT2PTR) for Writes

Bit 1 – FLTEN Fault Injection Enable

Value	Description
0	Disables the Read/Write Fault Injection
1	Enables the Read/Write Fault Injection as defined in FLTMD

Bit 0 – FLTRST Fault Logic Reset

Value	Description
0	No effect
1	Resets all FLT registers (FLTCTRL, FFLTPTR, FFLTADR, FFLTCAP, FFLTPAR, FFLTSYN)

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